2018 International Conference On Computer Aided Design

The Premier Conference Devoted to Technical Innovations in Electronic Design Automation

November 5-8, 2018Hilton San Diego Resort & Spa San Diego, CA

Hardware Intellectual Property (IP) Protection Techniques: What, When, and How to Use?

Tue, 2018-08-14 03:51 -- root
Globalization of Integrated Circuit (IC) design is forcing the IC/ IP designers and users re-assess their trust in hardware. As the IC design flow spans the globe, driven by cost-conscious consumer electronics, hardware is increasingly prone to new kinds of attacks such as counterfeiting, hardware Trojans, side channel analysis, reverse engineering and IP piracy.

High-Performance Deep Learning Accelerators on FPGAs

Tue, 2018-08-14 03:51 -- root
For both edge-devices and cloud servers, FPGA accelerators for deep neural networks have delivered favorable reconfigurability and performance. However, long hardware design time, prior homogeneous designs, and irregularities in deep learning algorithms have limited the achievable throughput and latency. To address these, the papers in this session present automated RTL generation with fine-grained pipelining, hardware-optimized algorithm adaptation, and integration of heterogeneous accelerators.

Resistance is Not Futile (for RAM)

Tue, 2018-08-14 03:51 -- root
Resistive RAM (ReRAM) is an emerging non-volatile storage and near-memory computing solution that promises to disrupt traditional computing as we know it. The papers in this session propose a robust hybrid ReRAM fabric, explore the use of energy-efficient and fast logic implementations in ReRAM fabrics, and the use of ReRAM in executing emerging deep learning workloads.

The Non-Unified Theory of Approximate Computing

Tue, 2018-08-14 03:51 -- root
This session deals with trading off computational accuracy and energy efficiency. The first paper explores a novel classifier-approximator architecture for approximate computing on a low-power accelerator. The second paper advocates a new approach based on stochastic computing to trade off accuracy and circuit level efficiency. The final paper advocates a theoretically-robust methodology for optimizing multi-output approximate logic. 

Machine Learning for Electronic Design Automation: Modeling, Optimization, and Resilience

Tue, 2018-08-14 03:51 -- root
The rate of growth of Big Data, slowing down of Moore’s law, and the rise of emerging applications pose significant challenges in the design of large-scale computing systems with high-performance, energy-efficiency, and reliability. This special session will consider solutions based on machine learning and data analytics to address the following challenges: (1) How can we model the performance and power consumption of heterogeneous systems and interconnects using machine learning techniques?

Security of Emerging Architectures

Tue, 2018-08-14 03:51 -- root
Computing of tomorrow will critically rely on radically new architectural paradigms, driven by a new set of applications, including deep learning, real-time classification of massive arrays of sensor data, comprehension and pattern recognition in big-data sets. Emerging architectures offer tremendous advantages with respect to various design objectives, but one important target has been neglected so far: security. Adversarial attacks can target a system’s communication links, the software running on it, and the humans using it. However, the

Clean Up Your Data

Tue, 2018-08-14 03:51 -- root
This session focuses on managing data in a secure and energy-efficient manner for SSD storage and bus-based communication architectures. The papers in this session propose novel strategies for fast sanitization of data in MLC Flash memory, secure data placement in SSDs, and energy-efficient approximations when sending data over on-chip buses.

Device Optimization for Reliability and Performance Enhancement

Tue, 2018-08-14 03:51 -- root
This session presents enhanced modeling and analysis to improve performance in a variety of devices while accounting for the effects of noise and aging induced delay increases. The first paper presents a novel analytical model of static noise margin in SRAM cells. The second paper enhances the reliability of circuits by handling transistor aging through adaptive voltage guardbanding with online monitoring. The last paper presents models for analyzing the variation of transistor characteristics in flexible electronics, and proposes practical methods for its compensation.

Networking Reception

Tue, 2018-08-14 03:51 -- root

Whatever your goal, networking receptions are the perfect venue for you to expand your network and keep you connected! Join us today to catch up with your colleagues and discuss the day's presentations with the conference presenters. All attendees are invited.

2018 CAD Contest at ICCAD

Tue, 2018-08-14 03:51 -- root
The CAD Contest at ICCAD (https://iccad-contest.org/) is a challenging, multi-month, research and development competition, focusing on advanced, real-world problems in the field of Electronic Design Automation (EDA). Contestants can participate in one or more problems provided by EDA/IC industry. The prizes will be awarded at an ICCAD special session dedicated to this contest.

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