2018 International Conference On Computer Aided Design

The Premier Conference Devoted to Technical Innovations in Electronic Design Automation

November 5-8, 2018Hilton San Diego Resort & Spa San Diego, CA

2nd International Workshop on Quantum Compilation

Tue, 2018-08-14 03:51 -- root
The workshop aims to bring together researchers from quantum computing, electronic design automation, and compiler construction. Open questions that we anticipate this group to tackle include new methods for circuit synthesis and optimization, optimizations and rewriting, techniques for verifying the correctness of quantum programs, and new techniques for compiling efficient circuits and protocols regarding fault-tolerant and architecture constraints.


The scope of the workshop includes, but is not limited to, current hot topics in quantum circuit design such as:

Networking Reception

Tue, 2018-08-14 03:51 -- root
Whatever your goal, networking receptions are the perfect venue for you to expand your network and keep you connected! Join us today to catch up with your colleagues and discuss the day's presentations with the conference presenters. All attendees are invited.

Taming the Wild: Scalable Methods in Verification

Tue, 2018-08-14 03:51 -- root
The growing size and complexity of integrated circuits and systems makes scalability of verification solutions an increasingly important problem. This session presents three innovations in this space. The first paper introduces a new theoretical framework for mitigating the verification complexity of large arithmetic circuits. The second paper develops a formal model for the verification of GPU architectures. The third paper presents an emulation platform for mixed-signal systems with high-accuracy and throughput.

Computer-Aided Design for Quantum Computation

Tue, 2018-08-14 03:51 -- root
Quantum computation is currently moving from an academic idea to a practical reality. The recent past has seen tremendous progress in the physical implementation of corresponding “quantum computers” -- also involving “big players” such as Google, IBM, Intel, Rigetti, Microsoft, and Alibaba. The corresponding devices promise substantial speedups over conventional computers for applications like quantum chemistry, optimization,machine learning, cryptography, quantum simulation, or systems of linear equations.

A Journey from Physics to System Level on the Reliability Tracks

Tue, 2018-08-14 03:51 -- root
Reliability has become a significant challenge for design of current nanometer integrated circuits (ICs). Reliability degradation caused by aging effects (time-dependent degradations) and transient soft-errors (time-independent degradations) are becoming limiting constraints in emerging computing and communication platforms due to increased failure rates from the continuous transistor scaling, increasing process variations and aggressive power reductions. Reliability problems will get worse as future chips will show signs of aging much faster than the previous generations.

Advances in Neural Networks and Microfluidics

Tue, 2018-08-14 03:51 -- root
Biology and biologically-inspired computing models are at the forefront of today and tomorrow's economy. The first two papers in this session explore the hardware implementations of neural network models targeting applications ranging from prosthetics to speech recognition and computer vision. The third paper explores binarization as a way to reduce the cost and complexity of convolutional neural networks implemented in hardware.

High-Throughput Computing and Efficient Data Movement

Tue, 2018-08-14 03:51 -- root
The papers in this session exploit code generation and transformation techniques to achieve high throughput and efficient data movement. The first paper presents a framework for efficiently mapping stencil computations to FPGA platforms while the second presents a compilation framework based on the polyhedral model that translates high-level arithmetic-intensive kernels to systolic arrays on FPGAs. The third paper extracts data access patterns from an application to partition memory and generate data reuse logic.

Plug the Leaks: Side-Channel Attacks and Countermeasures

Tue, 2018-08-14 03:51 -- root
After twenty years, side-channel attacks are moving to new horizons. In this session, we have papers presenting attacks on GPUs, at board-level, on the elliptic-curve library, and active countermeasures against EM attacks. The first paper proposes an active defense against electromagnetic side-channel attacks by adjusting the power grid impedance. It includes both formal and EM simulation-based validation of the proposed defense. The second paper focuses on the challenges of mounting timing-based side-channel attacks on GPU accelerators and demonstrates a practical attack breaking the RSA.


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