2018 International Conference On Computer Aided Design

The Premier Conference Devoted to Technical Innovations in Electronic Design Automation

November 5-9, 2018Hilton San Diego Resort & Spa San Diego, CA

Tue, 2017-08-29 15:54 -- root
This session brings together new advances in technologies and architectures that enable a new generation of highly efficient system-level optimizations that were previously not possible. The first paper conducts a comparison of performance and cost evaluation for traditional 2D monolithic SoCs, 2.5D passive interpose and 2.5/3D active interposer and evaluates their tradeoffs. The session goes on with a presentation based on a hybrid STT-RAM/SRAM register file exploiting the advantages of both technologies to enable an efficient warp scheduler that significantly improves system performance and energy efficiency. The third paper proposes a novel NoC architecture that allows a single-cycle multi-hop and thereby allows for a novel tradeoff between latency and energy-efficiency.
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Regular Session
Salons B2 & C
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Wednesday, November 15, 2017 -
16:15 to 17:45
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