2017 International Conference On Computer Aided Design

The Premier Conference Devoted to Technical Innovations in Electronic Design Automation

November 13-16, 2017Irvine Marriott Irvine, CA

EDA/CAD in the IoT eHealth Era: From Devices to Architectures, Applications, and Data Analytics

Tue, 2017-08-29 15:54 -- root
The interaction between technology and healthcare has a long history. Recent years have seen rapid growth in the Internet of Things (IoT) paradigm, the advent of miniature wearable biosensors, and research advances in “Big Data” techniques for effective manipulation of large, multiscale, multimodal, distributed and heterogeneous data sets. These advances have generated new and exciting opportunities for personalized precision eHealth and mHealth services.

10th IEEE/ACM Workshop on Variability, Modeling, and Characterization (VMC)

Tue, 2017-08-29 15:54 -- root

This workshop provides a forum to discuss current practice as well as near future research needs in the long-term trend of variability/reliability and their impact on design performance and cost, as well as detailed technical aspects of variability/reliability characterization, compact modeling, statistical simulation, test structure design, CAD, as well as resilient design. The workshop also provides an opportunity to discuss emerging modeling and characterization needs in emerging devices. The following are the key areas that will be covered.

International Workshop on Design Automation for Analog and Mixed-Signal Circuits

Tue, 2017-08-29 15:54 -- root
Growing digitization of integrated circuits has contributed to making system-on-chips ever more complex. Yet, a substantial portion of a chip consists of analog and mixed-signal (AMS) circuits that provide critical functionality like signal conversion. Over the past several decades, aggressive scaling of IC technologies, as well as advancing the integration of heterogeneous physical domains on chip, substantially complicates the design of AMS components. On the one hand, their modeling and design becomes extremely complex.

Hardware and Algorithms for Learning On-a-Chip (HALO)

Tue, 2017-08-29 15:54 -- root

Machine learning algorithms, such as those for image based search, face recognition, multi-category classification, and scene analysis, are being developed that will fundamentally alter the way individuals and organizations live, work, and interact with each other. However, their computational complexity still challenges the state-of-the-art computing platforms, especially when the application of interest is tightly constrained by the requirements of low power, high throughput, small latency, etc.

Emerging Design Methodologies for Analog/RF/Mixed-Signal Circuits and Systems

Tue, 2017-08-29 15:54 -- root
The advances of emerging analog/RF/mixed-signal circuits and systems call for radically new design methodologies. The first paper presents a new optimization algorithm to program re-configurable RF systems. The second paper proposes a reliability-aware design methodology for emerging FinFET technology. The final paper develops an intelligent machine learning approach for yield learning.

Frameworks and Methodologies for Heterogeneous Computing

Tue, 2017-08-29 15:54 -- root
Heterogeneous computing is difficult. Thus, frameworks and methodologies require constant innovation to facilitate the use heterogeneous platforms. The first paper discusses a general distributed mobile computing system for deployment of large scale deep neural networks. The second paper proposes a general distributed programming environment inspired by EDA applications. The final paper introduces a method to protect IP of convolutional neural networks.

Next Generation System Level Technologies

Tue, 2017-08-29 15:54 -- root
This session brings together new advances in technologies and architectures that enable a new generation of highly efficient system-level optimizations that were previously not possible. The first paper conducts a comparison of performance and cost evaluation for traditional 2D monolithic SoCs, 2.5D passive interpose and 2.5/3D active interposer and evaluates their tradeoffs.

Counteracting and Preventing Hardware Trojans

Tue, 2017-08-29 15:54 -- root
Hardware trojans are a serious threat for circuit designers. The first paper in this session proposes a novel technique for injecting hardware trojans exploiting don’t cares. The second paper presents how to automate the process of detecting Trojans hiding in unspecified functionalities, while the third paper describes efficient techniques for detecting analog and digital malicious modifications.

Critical Infrastructure Safety and Security - Challenges and Research Opportunities

Tue, 2017-08-29 15:54 -- root
The nation's critical infrastructure backbone of a nation's economy, security, and health. In USA, provides the essential services that underpin the society and serve as the 16 critical infrastructure sectors have been identified by the Department of Homeland Security (DHS). We know it as the power we use in our homes, the water we drink, the transportation that moves us, the stores we shop in, and the communication systems we


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