2017 International Conference On Computer Aided Design

The Premier Conference Devoted to Technical Innovations in Electronic Design Automation

November 13-16, 2017Irvine Marriott Irvine, CA

Tue, 2017-08-29 15:54 -- root
This session addresses a range of synthesis problems that span clockless paradigm, approximate computing, datapath optimization, and accurate modeling of HLS-generated accelerators. The first paper proposes a new framework for improving quality of asynchronous circuits leveraging a suite of existing tools. The paper on the approximate computing presents a new method synthesizing arithmetic circuits. The third paper exploits graph isomorphism to achieve more efficient resource sharing at bit-level. The final paper enables a fast design-space exploration for C-based HLS by accurately modeling the generated accelerators.
Event ID: 
12a05154-f71b-45ef-84d5-02772fa15cc5
Event Type: 
Regular Session
Location: 
Salons A & B1
Event Time: 
Tuesday, November 14, 2017 -
13:45 to 15:45
Session Number: 
6
Session Number Suffix: 
A
Session Number: 
6
confID: 
242