CONVENED MONDAY November 02, 4:30pm - 6:00pm | Oak




SESSION 3A

REGULAR SESSION: Emerging Topics in Test and Reliability
Moderator: Dhruva Acharyya - Verigy Ltd.

The first two papers address the test challenges associated with pre-bond 3-D dies. The third paper proposes a method for optimizing the allocation of BIST controllers to multiple embedded memory cores. The last paper introduces a synergy between reliability monitoring resources and the operating system to avoid performance degradation.

3A.1* Pre-Bond Testable Low-Power Clock Tree Design for 3-D Stacked ICs
 Speaker: Xin Zhao - Georgia Institute of Technology
 Authors: Xin Zhao - Georgia Institute of Technology
Dean L. Lewis - Georgia Institute of Technology
Hsien-Hsin S. Lee - Georgia Institute of Technology
Sung Kyu Lim - Georgia Institute of Technology
3A.2 Layout-Driven Test-Architecture Design and Optimization for 3-D SOCs under Pre-Bond Test-Pin-Count Constraint
 Speaker: Jiang Li - The Chinese Univ. of Hong Kong
 Authors: Jiang Li - The Chinese Univ. of Hong Kong
Qiang Xu - The Chinese Univ. of Hong Kong
Krishnendu Chakrabarty - Duke Univ.
T. M. Mak - Intel Corp.
3A.3s BIST Design Optimization for Large-Scale Embedded Memory Cores
 Speaker: Tzuo-Fan Chien - National Taiwan Univ.
 Authors: Tzuo-Fan Chien - National Taiwan Univ.
Wen-Chi Chao - National Taiwan Univ.
Chien-Mo Li - National Taiwan Univ.
Yao-Wen Chang - National Taiwan Univ.
Kuan-Yu Liao - National Taiwan Univ.
Ming-Tung Chang - Global Unichip Corp.
Min-Hsiu Tsai - Global Unichip Corp.
Chih-Mou Tseng - Global Unichip Corp.
3A.4s Operating System Scheduling for Efficient Online Self-Test in Robust Systems
 Speaker: Yanjing Li - Stanford Univ.
 Authors: Yanjing Li - Stanford Univ.
Onur Mutlu - Carnegie Mellon Univ.
Subhasish Mitra - Stanford Univ.


* indicates Best Paper Candidate